If one reviews the literature, there will be found several computer systems having a single shared memory and multiple processing units. These processing units, or functional units, and the shared memory must be connected to one another. The interconnection can be made through a switch. In this way of interconnecting computers, data enters the switch at some port, and after some delay, is consumed at the other port. This transport, interchange, shift, exchange, or router function, is provided by a switch. While the implementation of the switch may involve buffering the data within the switch, the implementation is essentially memoryless. Now, when multiple processors are employed with shared memory, data objects are stored within a shared memory device. Those computing systems that have access to the device can share the objects residing there. If some of the computing systems sharing objects have write access to these objects a variety of issues that concern coherence and correctness arise. The art has recognized these concerns and there are some ways to address these solutions, but they don't handle the problems adequately for larger parallel systems.
Distributed shared memory computer systems have been described in publications and patents which have not coherently handled the problems of communication between computers sharing data. Some of these publications and patents will be cited.